Analog Devices ADSP-2186 Manuale Utente

REV. 0Information furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsu

ADSP-2186–10–REV. 0Bootstrap Loading (Booting)The ADSP-2186 has two mechanisms to allow automatic load-ing of the internal program memory after reset.

ADSP-2186–11–REV. 0configured as an input is synchronized to the ADSP-2186’sclock. Bits that are programmed as outputs will read the valuebeing output

ADSP-2186–12–REV. 0The EZ-ICE®* connects to your target system via a ribbon cableand a 14-pin female plug. The female plug is plugged onto the14-pin c

–13–REV. 0ADSP-2186RECOMMENDED OPERATING CONDITIONSK Grade B GradeParameter Min Max Min Max UnitVDD4.5 5.5 4.5 5.5 VTAMB0 +70 –40 +85 °CELECTRICAL CHA

ADSP-2186–14–REV. 0ESD SENSITIVITYThe ADSP-2186 is an ESD (electrostatic discharge) sensitive device. Electrostatic charges readilyaccumulate on the h

ADSP-2186–15–REV. 0ENVIRONMENTAL CONDITIONSAmbient Temperature Rating:TAMB=TCASE – (PD x θCA)TCASE= Case Temperature in °CPD = Power Dissipation in Wθ

ADSP-2186–16–REV. 0CAPACITIVE LOADINGFigures 9 and 10 show the capacitive loading characteristics ofthe ADSP-2186.CL – pFRISE TIME (0.4V–2.4V) – ns303

ADSP-2186REV. 0–17–TIMING PARAMETERSParameter Min Max UnitClock Signals and ResetTiming Requirements:tCKICLKIN Period 60 [50] 150 nstCKILCLKIN Width L

ADSP-2186REV. 0–18–TIMING PARAMETERSParameter Min Max UnitInterrupts and FlagTiming Requirements:tIFSIRQx, FI, or PFx Setup before CLKOUT Low1, 2, 3,

ADSP-2186REV. 0–19–Parameter Min Max UnitBus Request/GrantTiming Requirements:tBHBR Hold after CLKOUT High10.25 tCK + 2 nstBSBR Setup before CLKOUT Lo

ADSP-2186–2–REV. 0biased rounding, result free ALU operations, I/O memory trans-fers and global interrupt masking for increased flexibility.Fabricated

ADSP-2186REV. 0–20–TIMING PARAMETERSParameter Min Max UnitMemory ReadTiming Requirements:tRDDRD Low to Data Valid 0.5 tCK – 9 + w nstAAA0–A13, xMS to

ADSP-2186REV. 0–21–Parameter Min Max UnitMemory WriteSwitching Characteristics:tDWData Setup before WR High 0.5 tCK – 7+ w nstDHData Hold after WR Hig

ADSP-2186REV. 0–22–TIMING PARAMETERSParameter Min Max UnitSerial PortsTiming Requirements:tSCKSCLK Period 50 nstSCSDR/TFS/RFS Setup before SCLK Low 4

ADSP-2186REV. 0–23–Parameter Min Max UnitIDMA Address LatchTiming Requirements:tIALPDuration of Address Latch1, 310 nstIASUIAD15–0 Address Setup befor

ADSP-2186REV. 0–24–TIMING PARAMETERSParameter Min Max UnitIDMA Write, Short Write CycleTiming Requirements:tIKWIACK Low before Start of Write10nstIWPD

ADSP-2186REV. 0–25–Parameter Min Max UnitIDMA Write, Long Write CycleTiming Requirements:tIKWIACK Low before Start of Write10nstIKSUIAD15–0 Data Setup

ADSP-2186REV. 0–26–TIMING PARAMETERSParameter Min Max UnitIDMA Read, Long Read CycleTiming Requirements:tIKRIACK Low before Start of Read10nstIRPDurat

ADSP-2186REV. 0–27–Parameter Min Max UnitIDMA Read, Short Read CycleTiming Requirements:tIKRIACK Low before Start of Read10nstIRPDuration of Read 15 n

ADSP-2186REV. 0–28–100-Lead TQFP Package Pinout543276981D19D18D17D16IRQE+PF4IRQL0+PF5GNDIRQL1+PF6DT0TFS0SCLK0VDDDT1TFS1RFS1DR1GNDSCLK1ERESETRESETD15D1

ADSP-2186REV. 0–29–TQFP Pin ConfigurationsTQFP Pin TQFP Pin TQFP Pin TQFP PinNumber Name Number Name Number Name Number Name1 A4/IAD3 26 IRQE + PF4 51

ADSP-2186–3–REV. 0The shifter can be used to efficiently implement numericformat control including multiword and block floating-pointrepresentations.T

ADSP-2186REV. 0–30–OUTLINE DIMENSIONSDimensions shown in mm and (inches).100-Lead Metric Thin Plastic Quad Flatpack (TQFP)(ST-100)ORDERING GUIDEAmbien

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C2999–6–3/97PRINTED IN U.S.A.–32–

ADSP-2186–4–REV. 0concurrently on multiplexed pins. In cases where pin func-tionality is reconfigurable, the default state is shown in plaintext; alte

ADSP-2186–5–REV. 0To minimize power consumption during power-down, configurethe programmable flag as an output when connected to a three-stated buffer

ADSP-2186–6–REV. 0IdleWhen the ADSP-2186 is in the Idle Mode, the processor waitsindefinitely in a low power state until an interrupt occurs. Whenan u

ADSP-2186–7–REV. 0Clock SignalsThe ADSP-2186 can be clocked by either a crystal or a TTL-compatible clock signal.The CLKIN input cannot be halted, cha

ADSP-2186–8–REV. 0There are 8K words of memory accessible internally when thePMOVLAY register is set to 0. When PMOVLAY is set to some-thing other tha

ADSP-2186–9–REV. 0Byte MemoryThe byte memory space is a bidirectional, 8-bit-wide, externalmemory space used to store programs and data. Byte memory i